A magnetic memory device is proposed in which magnetoresistive elements and MOS transistors are integrated on a semiconductor substrate.
The above-described magnetoresistive element is typically configured such that a stacked structure including a storage layer, a tunnel barrier layer, and a reference layer is provided on an underlayer. Therefore, in order to achieve an excellent magnetoresistive element, it is important to choose an appropriate underlayer.
However, conventionally, a magnetoresistive element having an appropriate underlayer is not necessarily proposed.